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yigitbektasgursoy
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Yiğit Bektaş Gürsoy
@yigitbektasgursoy
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🇹🇷 Istanbul
TUBITAK BILGEM
Profile age: almost 4 years
Updated 6 days ago
38 followers • 18 following
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in/yigit-bektas-gursoy
Repositories
Electronics_and_Communication_Engineering_ITU
68
5
updated about 1 year ago • age over 2 years
VHDL
96.0%
Verilog
3.1%
C++
0.5%
Tcl
0.2%
AGS Script
0.2%
SDRAM_Verilog
29
2
updated over 1 year ago • age over 1 year
Verilog
100.0%
Motion_Estimation_Hardware_Verilog
12
1
updated over 1 year ago • age over 1 year
Verilog
92.6%
Python
7.4%
symmetric_FIR_Filter_Verilog
6
2
updated 9 months ago • age 10 months
Verilog
66.3%
Python
33.7%
Parametric-Convolution-SystemVerilog
5
0
updated 12 months ago • age almost 2 years
SystemVerilog
82.2%
C++
17.8%
cache_simulator
5
1
updated 4 months ago • age 5 months
C++
64.7%
Python
15.4%
C
15.2%
Makefile
3.5%
Shell
1.3%
Contributions
