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rejunity
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Renaldas Zioma
@rejunity
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Research
Profile age: over 13 years
Updated 12 days ago
154 followers • 160 following
Contacts
https://twitter.com/__ReJ__
in/renaldas
Repositories
z80-open-silicon
683
28
updated 4 months ago • age over 1 year
Verilog
96.1%
Python
3.2%
Makefile
0.7%
tiny-asic-1_58bit-matrix-mul
161
11
updated over 1 year ago • age over 1 year
Verilog
66.5%
Python
31.0%
Tcl
1.6%
Makefile
0.9%
tt05-psg-sn76489
55
8
updated 11 months ago • age about 2 years
Python
77.8%
Verilog
19.2%
Shell
1.8%
Makefile
1.2%
tiny-atari-2600
44
2
updated 15 days ago • age about 1 year
Python
89.8%
Assembly
7.9%
Verilog
2.1%
C
0.2%
C++
0.1%
tt08-vga-drop
13
4
updated 11 months ago • age about 1 year
Verilog
68.0%
GLSL
21.2%
Python
7.0%
Makefile
3.8%
tt07-analog-dac-ay8913
11
0
updated over 1 year ago • age over 1 year
Tcl
41.9%
Makefile
41.9%
Verilog
16.3%
tiny-asic-4bit-matrix-mul
9
5
updated over 1 year ago • age over 1 year
Verilog
61.6%
Python
35.7%
Tcl
1.8%
Makefile
0.9%
cs-from-scratch
6
1
updated almost 6 years ago • age almost 6 years
tt05-psg-ay8913
6
1
updated 11 months ago • age almost 2 years
Python
69.1%
Verilog
29.0%
Makefile
1.0%
Shell
0.9%
tt05-rule110
5
0
updated almost 2 years ago • age about 2 years
Verilog
42.8%
Python
41.0%
Tcl
11.4%
Makefile
4.9%
Show more - 10 of 17 shown
Contributions
2025
TrainableLogicGateNetworks
2 PRs
+18
-7
Python
3
1
ttsky25a-tinyQVb
1 PR
+998
-3
Verilog
2
15
tinytapeout-ihp-25a-sources
2 PRs
+28,383
-45
Verilog
0
1
2024
vga-playground
2 PRs
+808
-10
JavaScript
65
13
tinytapeout_gds_viewer
~6 PRs
+425
-411
JavaScript
19
9
magic_challenge
1 PR
+1
-0
Tcl
3
1
2023
tinytapeout-05
2 PRs
+375
-192
Verilog
5
9
1
2021
suicide-barbie
1 PR
+6
-4
C++
84
7
2
riscv-hobby-os
3 PRs
+858
-244
C
29
6
2020
riscv-hello-asm
2 PRs
+85
-23
Assembly
60
10
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