Kunal Ghosh

@kunalg123

Open GitHub

🇮🇳 Bangalore, India

VLSI System Design Corp. Pvt. Ltd.

Profile age: over 8 years

Updated 10 days ago

417 followers • 1 following

Contacts

kunalpghosh@gmail.com

https://www.vlsisystemdesign.com/

Repositories

vsdflow

163

updated over 2 years ago • age almost 8 years

Verilog68.4%

Tcl24.6%

Shell7.0%

icc2_workshop_collaterals

updated over 5 years ago • age over 5 years

Verilog93.2%

Coq3.3%

Tcl2.2%

HCL1.3%

riscv_workshop_collaterals

updated about 5 years ago • age over 5 years

Coq47.2%

Assembly30.6%

C16.1%

Verilog4.0%

Makefile2.1%

flipflop_design

updated over 6 years ago • age over 6 years

sky130RTLDesignAndSynthesisWorkshop

updated about 3 years ago • age over 4 years

Verilog99.8%

Tcl0.2%

rvmyth

updated about 4 years ago • age over 4 years

Verilog80.5%

SystemVerilog19.5%

Contributions

2020
risc-v-core
1 PR +2,207-18
Verilog
79
42